Electronic Packaging Materials - Technology bright star
The increasing importance of electronic packaging industry
From the second half of the 20th century, since , as the center of the semiconductor electronics industry , the amazing growth and brisk performance . Looking at the scientific and technological development in Taiwan , the booming electronics industry and related industries with considerable progress in recent years , it is obvious to all .
In the electronics industry , the most notable addition to the semiconductor industry , the electronic packaging industry (Electronic Packaging Industry) is also accompanied by electronic light, thin, short, small and require high functionality while more and more important , more and semiconductor industry evenly divided trend. Packaging technology electronic packaging industry is more innovation, such as ball grid array package (Ball Gate Array Package), plastic needle out packaging (Plastic Pingrid Array Package), TQFP, TSOP , etc.
Electronic packaging technology to see what
Electronic packaging technology is that after completion of production of the semiconductor integrated circuit , together with other electronic components in an assembly -line configuration to become part of an electronic product , in order to achieve a specific design of all process functions . Electronic Packaging has four main functions , namely energy transfer (Power Distribution), signal transmission (Signal Distribution), heat dissipation (Heat Dissipation) Support and Protection (Protection and Support).
Electronic Packaging and可依distance and integrated circuits , divided several different levels: the first level packaging (First Level Packaging), also known as wafer -level packaging (Chip Level Packaging), as the plot circuit chip and package structure joined to form electronic components (Electronic Module) manufacturing process ; plastic shown in Figure 1 double row packaging (Plastic Dual-in-line Package, PDIP), its first -level packaging bear then the wafer (Die Attach), wire bonding (Wire Bond) with sealant (Encapsulation) and other processes. The second level of packaging (Second Level Packaging), refers to the configuration of the first hierarchy by the other electronic components mounted on the circuit board in combination , form a circuit card or circuit board ; mounted in the second configuration , the most common concern is the production of printed circuit boards and components connected to the circuit board technology , such as the needle through-hole technique (Pin Through Hole, PTH) and surface mount technology (Surface Mount Technology, SMT). The third level packaging (Third Level Packaging) and fourth -level packaging (Fourth Level Packaging), refers to the circuit board and card combination to form sub- system and system-generated effects process .
Electronic packaging process using metallic materials
Outgoing connections semiconductor wafer , mainly Flip (Flip Chip), tape automated bonding (Tape Automatic Bonding, TAB) and wire bonding (Wire Bond) , three common techniques , wire bonding is the method most commonly used in Figure I , the first wafer to a suitable material, such as Au-Si, Au-Sn eutectic (Eutectic) or eating more commonly filled epoxy (Epoxy) adhesive , fixing the metal chips leadframe (Lead Frame); then ultrasonic bonding (Ultrasonic Bonding), hot bonding (Thermal Compression Bonding) or a combination of both methods , the thin metal wire in sequence with the chip and lead frame to complete the engagement . In flip-chip bonding process technology , the wafer bonded to the substrate solder dependent (Solder), shown in figure II . Solder process and other materials according to their use of the system , and there is not the same ingredient choices, they use form is not consistent , common with welding rods (Solder Bar), solder bump (Solder Ingot), wire (Solder Wire) and paste (Solder Paste) , etc., in the flip chip bonding process, the production of the wafer corresponding to the most important part of the solder bumps (Solder Bump) substrate . In these processes, gold, platinum , nickel , copper, chromium is often a thin layer deposited on the wafer substrate , to increase and to improve the wettability and adhesion between the solder .